1. Field of the Invention
The invention relates to a voltage converter. In particular, the invention relates to a multiphase, multistage voltage converter.
2. Description of the Related Art
FIG. 1 shows conventional three stage two-Phase voltage doubler (TPVD) 100 comprising capacitors C101, C102, C103, C104 and C105, loading capacitor Cload and switches 101˜112. Input terminal 110 receives a direct current (DC) input voltage Vin. Output terminal 120 outputs an output voltage Vout. Switch 101 is coupled between node 131 and input terminal 110. Switch 102 is coupled between nodes 131 and 133. Switch 103 is coupled between input terminal 110 and node 132. Switch 104 is coupled between node 132 and ground GND. Capacitor C101 is coupled between nodes 131 and 132. Capacitor C102 is coupled between node 133 and ground GND. Switch 105 is coupled between nodes 133 and 134. Switch 106 is coupled between nodes 134 and 136. Switch 107 is coupled between nodes 133 and 135. Switch 108 is coupled between node 135 and ground GND. Capacitor C103 is coupled between nodes 134 and 135. Capacitor C104 is coupled between node 136 and ground GND. Switch 109 is coupled between nodes 136 and 137. Switch 110 is coupled between node 137 and output terminal 120. Switch 111 is coupled between nodes 136 and 138. Switch 112 is coupled between node 138 and ground GND. Capacitor C105 is coupled between nodes 137 and 138. Capacitor Cload is coupled between output terminal 120 and ground GND.
Switches 101, 104, 105, 108, 109 and 112 are turned on and switches 102, 103, 106, 107, 110 and 111 are turned off in first phase φ1. Switches 102, 103, 106, 107, 110 and 111 are turned on and switches 101, 104, 105, 108, 109 and 112 are turned off in second phase φ2. The voltage level of node 131 is charged to input voltage Vin during first phase φ1, and to double input voltage 2 Vin during second phase φ2. The voltage level of node 132 is zero during first phase φ1 and Vin during second phase φ2. Therefore, the voltage level of node 133 is charged to double input voltage 2 Vin. Similarly, the voltage level of node 136 is charged to four times input voltage 4 Vin and the voltage level of loading capacitor Cload is charged to eight times input voltage 8 Vin. The voltage transfer gain of three stages TPVD 100 is eight. In high current application, capacitors must have high capacitance. However, such capacitors can't be implemented in the voltage converter chip, thus external capacitors are required with corresponding pin increase and increased size, resulting in high cost and more space requirements.